Manual Power Planes Decoupling Capacitors Design Using SIwave

Hi, my name is Hatem Akal and today's presentation is about "Manual power planes decoupling capacitors design using SIwave." There are many ways to do power integrity. We are going to present here one technique. You need to remember two things when doing power integrity.

First, do not try to design all the power planes in your PCB simultaneously. Do them one by one. Second, do not use ideal capacitors. Use the models of the manufacturers. These models, they have non-zero ESL and ESR. Ideal capacitors have zero ESL and ESR and that's not right. Let us start.

So we have so many power planes. We're going to select the 1.2 volt. This board has already many, many decoupling caps from some old projects. We are not going to use them. We're going to add new ones based on a new specification. So I will disable them all. So we go to circuit element.

We go to capacitors. We select them all and we deactivate them. So you should see no. That's how we deactivate all the capacitors. Let's start now our PI design. Step number one, find the equivalent circuit of the VRM or some call it the output impedance of the VRM.

You will find them in the circuit. In the VRM data sheet. It's usually an inductance plus a resistor. For our case here, the VRM data sheet says that the value of the inductance is one nano Henry and the value of the resistance is around 10 milli ohm.

Step number two, verify if the VRM impedance meets the impedance specifications of the power plane. To do that, we go to tools, capacitor inductors, library browser. This is a very powerful tool in SIwave. But not so many know about it or use it. First add the VRM spec.

This is the impedance of the VRM by itself. We add now the specifications of the power plane. And let's say from 0.01 to 100 kilohertz, 100 megahertz and the spec is 0.03, 30 milli ohm. By the way, make sure not to put zero here.

As we can see, the VRM by itself is badly violating the specifications. In this case, we need to add decoupling caps right at the output of the VRM, but which one to choose? We refer to this table that shows the active band of many famous standard caps.

We choose the ones that fall within the band of interest below 100 meg. We can see here we can use the 10, 100, 1 micron. We don't want to use these ones because they are completely outside the band. We come here, you can select one supplier or two. In our case, for example, we select Murata.

You can select any other supplier. We select the size of 0.0402 and you can specify the value. In our case, we said 10 nano. Okay. And here you go. You have all the different possible capacitors that have exactly 10 nano. If we select the first one, now we see three curves.

The original VRM impedance curve, the cap curve, and the new curve, which is what happens to the VRM when you add one capacitor. The band of interest of the cap, half of it falls outside the band of interest. So it's not recommended to do something like that.

Usually we'd like to have a cap with a band totally inside the band of interest. So instead of using the one E-8, we're going to move to the next one, 100 nano. Make sure to remove the one you selected by making shifting it to zero. Change the filter to 100 nano. And again, let's select this one.

This is way much better. You can select something in between. But these are the standard filters. Okay. The standard kind of numbers, 10 nano, 100 nano. So instead of using just one, what we're going to do is we're going to use more. And maybe we're going to use seven or eight. Let's say seven.

Remember, we don't want to optimize the VRM. All what we want is to lower this curve to a reasonable level. So we added this. Now we have a hump here. So we go to the next one in the list and we go with one microfarad. Same thing. Now we would like to keep this one. We don't want to delete it.

So we come to the filter. We change to six. See, it falls right where we want it. Now let's see, for example, two, three. That's good enough. It looks flat here. The next one is 10 microfarad to handle this hump here. One E- 5. One E- 5. Sometimes this tool doesn't give you anything. Okay. Okay.

Okay. Okay. Same thing. Try to extend your search and you will see certain values. Now you can sort them. Select the GRM. And I think one is more than enough. Now we have a good response. So we go and we document these ones. These are our caps. So we selected seven from the hundred.

We select three from the one microfarad. 10 micro. Now what we want to do is we want to add these ones at the output of the VRM. So we have small numbers here, but suppose you have a lot of ones. Suppose you have like 20 here and 30 here. You're not going to go and add them directly in the model.

So what we're going to do is we're going to add them together in parallel. So 100 nano times 7 gives us 700 nano. But for the ESL and ESR you have to divide by 7. Same thing for 1000. It becomes 3000. And this is the equivalent ESR, equivalent ESL. And this is just one of them. Great.

So now we go to the model. We close this one. We're done with this one. And we go where the VRM is. So this is where the VRM. And the first thing we're going to do is we're going to add the impedance of the VRM. This is very important. From 1.2 volt to the ground.

And this is called, let's call it the VRM. And it's 1E-9 and the resistance is 1E- 3. 1E- 2. And now we would like to add the capacitors. So what is left now is to create one port at the CPU. And the way to do that is we go here. We select PI analysis. And we select our voltage.

And we assign a port. We create a port right at the CPU. 0.1 milli-ohm. As we said before, it's very important that you optimize one power plane at a time.

And if the power plane has so many components, you notice here it has yes, it's connected to the VRM, but it's also connected to many other components. Try to design them or optimize them one component at a time. In this case, we have, in this case, we are optimizing the connection to the CPU one.

And as you can see, we are selecting a single port. Always solve the PI problem as a single port. And I'm going to explain later on why it should be a single port. So we configure. We are ready to go. We are ready to solve. Configure. Validate. And we're going to select to be this one.

VRM with the DCAP plus the bare PCB. You select the band. I'm going to do it from one kilohertz to one gigahertz. So now we have a solution. We switch to Z parameter. And this is the curve that represents the power of the PC.

And we can see that the power of the PC is represented by the DCAP plus the PCB. We add the limit line again. So what we are looking at here is Z 11. But Z11 is equal to the impedance that the CPU is seeing at its input.

That's why we keep it a single port, because we can jump immediately and look at the result without having to do any post processing. Now we can see that we are still violating the specifications. So we need now to lower this down.

So what we do is we capture the values at 100 meg, which is 0.267, and also the value at DC, which is around 12.5 millioh. So we document these two. Close this. And we go back to our tool. So the tool here doesn't have any cap, just the VRM.

So what we want to do is we want to change the VRM in such a way that it match the other one.

So you start with the ESR and you make it equivalent to the number we got from the DC, which is 12.5 in minus 3. And for the ESL, we are going to change the number to 12. 5. And for the ESL, we are going to change the number to 12. 5. And for the ESL, you keep changing it. Let me do this.

Put a marker at 100 meg. So we want this value to go down to 0. 267. So we have a value of 0.28 when I used a VRM of 4.4 E minus 10, which is 0.44 nanohenry. That's good enough. So this one, this curve, matches now the VRM plus the decoupling cap plus the PCB without the additional notches here.

All what we care about is this curve. Now we add the limit line again. And this is the limit line. Now we want our dark line to go below this curve.

If you remember, when we looked at the decoupling cap, we said we're going to start with the 20 because we want the bend of the cap to be completely inside the model. For the case of the CPU, it's the other way around. It's okay to start from a cap that's half in, half out, for so many reasons.

This looks much better. I'm going to put them in a table, derive the equivalent, and now we're going to add them to the model. And that's what I did here. API, vault, configure, validate, and simulate. And we have a solution here. Let's plot the results. And bingo. We have a solution.

Remember, when you start doing PI, make sure on the VRM side, before you add the new ones, make sure to add the ones that the supplier is recommending. That's very important. Start by them first, then add more. The same thing for the CPU. In our case, we assume that there is nothing.

Nothing has been recommended. So we started from scratch. But if there are caps recommended by the CPU supplier, then you need to start, with them first then you add more. Why is this important because the caps at the CPU side they have another purpose they're not there just to fix the impedance.

Their whole job is to provide enough amount of current to the CPU when it's when it needs it.

Now that we finish designing 1.2 volt with the load of CPU, you can go back with the same setup, you can go back instead of looking studying the CPU one, you can change it and you can check the next component.

This time you're not gonna verify the VRM alone, you're gonna verify the whole thing together which is the VRM plus the decap plus the PCB plus the caps that we put for the CPU.

If you discover that this line doesn't meet the specifications of this component, then you add more at the input of this component and you repeat the same thing for all these components one by one and you repeat the same thing for all the other power planes. What is next after that is the trivial.

You add all these caps in the layout tool properly, then you import the modeling again and solve it. After all this work, it's highly recommended to run the PI advisor. The reason why is to be able to reduce the number of capacitors and to have a better configuration for your power planes.

Thanks for listening. Hopefully you enjoyed this approach.