PCIe Specifications Tool for RF Designers

PCIe: An Abbreviation for Peripheral Component Interconnect Express PCIe is an abbreviation for Peripheral Component Interconnect Express, an electrical interface standard used to connect high-speed add-in printed circuit boards to computer motherboards, GPUs, RAID cards, and SDS SD cards, among other add-in cards.

PCIe comes in various sizes, including X1, X4, X8, X16, and X 32. X1 stands for 1 TX Differential Line and 1 RX Differential Line. Therefore, X32 has 32 TX Differential Lines and 32 RX Differential Lines. You can use ANSYS2 to design a motherboard or an add-in board.

You can use SI Wave, HFSS, or 3D layout. However, if your board contains PCIe, how do you know your design is correct? You need to check it against the PCIe specifications. Building, assembling, and testing the PCB using well-known equipment is a costly way.

You would like to know if your design is acceptable while designing the PCB. OZEN engineers have developed a PCIe template to help you do that. The template supports PCIe 1 to PCIe 7 standards. If you open any one of them, you will find many circuits. Some of these have more than one circuit.

All the necessary constraints, specifications, and limits are embedded in these circuits. We are talking about hundreds of numbers embedded in all these circuits. These numbers are scattered in many places, but they are where they are supposed to be.

The circuits that we have here are just the beginning, and users can construct an unlimited number of circuits based on them. The most important thing to remember is that all the necessary building blocks and setups exist in this template. Make a copy of them and run your circuits.

Start by obtaining the pass parameters for your PCB, whether it's simulated or measured. Back to our template, what will you find in each circuit? Open any of these circuits. The first thing you will notice is the information below the circuit.

The first part is a detailed description of how to use the circuit. The second one is some of the standards used in the circuit. The third is what we call the preset setup for each standard to be used in the circuit. We will talk more about it later.

The fourth is a list of circuits local variables and their descriptions. These are the local variables used in the circuit, and changing them will only change the circuit. There are global variables, which you will see if you click on the name of the standard.

If you change these ones, it will change all the circuits in the standard because they are common to all of them. At the bottom, you will find examples of the results. These are just pictures to demonstrate how the results should look like.

This is in case one of the graphs changes, then the user can change it back to how it should look like. Each circuit contains an input section, a middle section, and an outer section. The input section contains all the possibilities for the source. You'll have here, for example, 10 possibilities.

Each possibility is represented by one I source and one I probe. The user can activate or deactivate any of these circuits. The more circuits you activate, the longer the simulation takes. It increases exponentially. That's why it's highly recommended to simulate one circuit at a time.

The input section has a switch that allows you to select which I source and I probe circuit to activate and which channel to test. If you have many channels, you can use a four-channel switch or an eight-channel switch.

The output section has a switch so that you can select between channels and the different source and probes. Each I probe is connected to one source. The number of I probes must match the number of I sources. Each one of these is a circuit by itself.

The global variables list is in the middle section. You can use these variables to control which channel to use and which circuit. The middle section is the end of the video. It shows you how to change the parameters of the S-parameter files. It's more complicated than this.

Click on it and push down again. It's a sub-circuit, and this is what you're gonna see. The S-parameter file from your simulation or from your measurement and these are additional losses that you need to add at the input and at the output of the S-parameter.

Why do we need to add more losses before and after? This picture was captured from the PCIe SIG society. It shows the constraints on the maximum loss of the adding card and how much is the maximum of the die on package loss, including the die. The same thing applies to the motherboard system board.

There's a maximum allowed loss. 26. 5. You can use these numbers and all these data for all the standards already embedded for you in the template. Go back to the global variables and enter these numbers for the input and for the output. You can set them to any value you want.

You can set them to the values specified in this table. You see in this table provides you all the information about the values as per the specification for that standard. You will find similar things for all the other circuits and all other standards.

Or you can keep them zero and maybe you just want to test your bare PCB alone. This is a full description of what you're going to see in each one of these circuits. The circuit pictures, components, and information. Now we would like to talk about the results.

The first thing to open is the single one. So, the single one is the one that has only one circuit. You have four channels, and this is where we hide our S-parameters and the attenuation lines. These are switches. These are four channels switches.

If you are looking for a channel, you will find them here, one for the input and one for the output. The single channel circuit can be used to do many initial testing. You can also use the optometric for the To study the effect of the voltage. The second plot is the height.

So, the I height plot is simply a contour plot. It's like painting of the bit error value. Again, you will find instructions on constructing a similar one. You will find a delta marker. You see here between M1 and M 2. That you need to move manually. Unfortunately, because this is a contour plot.

This is not a graph plot. It's like painting, as I said. So, we force this plot to have only one contour. And this contour must be at 1E-12 bit error rate. By reading the delta, we get the delta Y. That's the height of the die.

And that's the one that we can compare versus the specification, 25 millivolt.

That's the spec of the PCIe 3. The third graph is the statistical eye report, which is with respect to the unit interval from 0 to 1. If you right-click and you ask for trace characteristic, add all eye measurements, you will get this table with all the information about the height, the location, the average of the zero, average of one, eye amplitude, eye height, signal-to-noise ratio, jitter, all kinds of jitter, and minimum eye width and minimum eye height.

Unfortunately, none of these can be used against any of the specifications. The fourth type is the eye diagram, but this time with respect to the timeline, not with respect to the data. And as I've highlighted, with respect to the origin.

The quick eye analysis is used to generate these kinds of graphs. The verify eye analysis is used to generate the bathtub graphs. Sometimes you get weird results and you would like to know why. In this case, use the transient.

When you use the transient, you will be able to see the pattern in a nice way. Then you will be able to determine what is wrong with your eye. We look at the eye at this point at the output here using this voltage probe. The next one is the return loss.

It's an S-parameter solver where you bring your own S-parameter plus transmission lines before and after and you try to understand or study the return loss of the whole link. If you do that, you can run also the optometric to run for all the different channels.

So, this optometric is for the channel from one to four. And if you do that, you get the results. These are the results, and you see here the spec and these are the values for the different channels for the input and the output return loss for the differential.

There is a spec on the differential return loss. There is also another spec for the common mode. Again, we have all these channels, the output and the input for all the channels. And we have a spec on that. Spec at the bottom, and as you can see, we are violating the spec at low frequencies.

In addition to the return loss, we have the insertion loss. It's similar to the return loss with minor differences. If you click on this box and you say push down, you will notice that we are not using the global variables. We are using local variables by default. They are equal to the global ones.

But you can modify them. This circuit, the insertion loss, is to study the insertion, and you will get a graph similar to the return loss with the spec. So, we have a spec. We have a spec on the add-in card, which is the first one on top. And we have a spec on the full link.

And the information is provided to you here. And as you can see, we're passing the spec. If you go back to the circuit and go back, push down, you can modify the attenuation of the input and the attenuation of the output without changing any other circuit in the standard.

Without changing the other ones. And this is important because you want to use this circuit to study different losses. What happens if you increase the loss? What happens if you reduce the loss? Next, we have the crosstalk circuits.

So, we have the bare crosstalk alone, crosstalk plus jitter, and also crosstalk plus jitter. If you open the crosstalk one, you will see that we have three sources that need to be activated together to study the crosstalk. And we have four channels. So, we switch between channels.

This is what this switch will do for you. And the same thing at the output. It allows us to study the crosstalk for channel 2 and channel 3. If you select channel 1, this one will be deactivated automatically.

If you select channel 4, this one will be deactivated because there is nothing after channel 4. This is what you're gonna find. You're gonna find that we have added the jitter values and these values are added to the source to the middle one to the source in the middle under clock jitter.

Do not try to change them because they follow the standard. That's why it has its own circuit. And if you go to the jitter plus noise, you will find that we have added the jitter plus the noise together to see the effect. Going back to the preset one. So, in any PCIe, you can have some equalization.

This equalization is done by adding FFE to the I source. FFE stands for feed-forward equalization. In the ANSYS circuit tool, you can leave them unspecified and calculate. The circuit will optimize them for you.

But according to the specifications of the PCIe 3, they have to follow one of 10 possibilities. To study all the possibilities, we use 10 I sources. Each one of them has a specific value. For example, this one. These are the values because we want to study them all.

We want to see which one of them is the best option for this kind of PCB that we are designing. And these ways, you can find them here for all the different possibilities for each standard.

So, these are the values that we are allowed to use for PCIe 3. And all these 10 possibilities are embedded in these I sources. In addition to FFE, we have DFE and CTLE. If you go to the I probe, you will find DFE.

It has specific numbers of tabs per the specifications of PCIe 3. We are only allowed to have one tab. You can leave it as calculated. There are no specified values. So, you can leave it as one to be calculated by the circuit.

So, that's why you need to connect it to one source so they communicate with each other. The CTLE gain is a variable and can be changed from the local variable list. The range of values allowed as per the specifications is found in the single channel.

You will find the range allowed as per the specifications. The CTLE usually has so many poles and so many zeros. And this is the ADC. Some of these numbers here are a function of the poles. And some of them are a function of the zeros and the function of the ADC.

And all of these are programmed for you for the user in each one of these standards from PCIe 3 to PCIe 7. PCIe 1 and 2 do not have any equalization. The last circuit in our list is the equalization. So, the equalization allows you to study the contribution of each one of these ADCs. Equalizer.

Practically, the user won't like to know if he can get away with some of them. Can we get a good response using only FFE, DFE, FFE alone, none of them, DFE alone, CTLE alone, CTLE and DFE only, no need for FFE? That's the purpose of these circuits.

And again, there's a switch, and you can switch between the circuits, activate them one at a time, run them, look at the results, and make a decision. Whether this is a good option or bad option. In addition to the main circuits, you also have supportive circuits.

Where the user can study the inter-pair skew between two lanes. If you want to study the skew between P and N, you can use this circuit. You can also use this circuit using the traditional approach TDR to do TDR. To allow you to debug crosstalk.

The template does not do any design or optimization but can ensure that the design is meeting the specifications and by how much margin. As we said before, this template contains all the necessary blocks with the necessary setup.

So, the user can build other circuits to design or verify or test other numbers or other specifications. So, this is a very useful tool. It's a very useful tool. So, keep watching for updates on this template. Thank you.