PCIe Specifications Tool for RF Designers
PCIe, or Peripheral Component Interconnect Express, is an electrical interface standard used to connect high-speed add-in printed circuit boards to computer motherboards, GPUs, RAID cards, and various other add-in cards. PCIe slots come in different sizes: X1, X4, X8, X16, and X32. The number indicates the number of TX and RX differential lines, with X1 having 1 TX and 1 RX, and X32 having 32 TX and 32 RX.
Designing with PCIe
To design a motherboard or an add-in board, you can use tools like ANSYS2, SI Wave, HFSS, or 3D layout. If your board contains PCIe, it's crucial to ensure your design complies with PCIe specifications. Typically, this involves building, assembling, and testing the PCB using specialized equipment, which can be costly. However, you can use the PCIe template developed by Ozen Engineering, Inc. to verify your design during the design phase.
PCIe Template Features
The template supports PCIe standards from PCIe 1 to PCIe 7. Each standard includes multiple circuits, with all necessary constraints, specifications, and limits embedded within them. The template provides:
- A detailed description of how to use each circuit.
- Information on other standards used in the circuit.
- A preset setup for each standard.
- Lists of local and global variables with descriptions.
- Examples of expected results, such as bathtub and eye height measurements.
Circuit Structure
Each circuit contains:
- Input Section: Contains multiple possibilities for the source, represented by eye sources and probes. Users can activate or deactivate circuits, with more circuits increasing simulation time exponentially. It's recommended to simulate one circuit at a time.
- Middle Section: Involves S-parameter files and additional losses added at the input and output, based on standards. This section ensures compliance with constraints on maximum loss for add-in cards, die on package loss, and system boards.
- Output Section: Similar to the input section, with switches to select between channels and sources. The number of eye probes must match the number of eye sources.
Global and Local Variables
Global variables affect all circuits within a standard, while local variables affect only the specific circuit. Key variables include channel numbers and attenuation values for input and output, which can be adjusted based on the design requirements.
Results and Analysis
The template provides several types of results, including:
- Bathtub Plot: Used to calculate the eye width and compare it against specifications.
- Eye Height Plot: A contour plot showing bit error values, with a delta marker for manual adjustment.
- Statistical Eye Report: Provides detailed measurements like eye height, signal-to-noise ratio, and jitter.
- Eye Diagram: Displays with respect to the timeline, including a mask for width and height specifications.
Additional Analysis Tools
The template includes tools for:
- Return Loss: Analyzes differential and common mode return loss.
- Insertion Loss: Studies insertion loss with adjustable attenuation values.
- Crosstalk: Analyzes crosstalk with jitter and noise.
- Equalization: Studies the contribution of equalizers like FFE, DFE, and CTLE.
Conclusion
The PCIe template by Ozen Engineering, Inc. is a comprehensive tool for ensuring compliance with PCIe specifications. It provides all necessary blocks and setups for designing, verifying, and testing circuits, with updates available for new standards.
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PCIe is an abbreviation for Peripheral Component Interconnect Express, an electrical interface standard used to connect high-speed add-in printed circuit boards to computer motherboards, GPUs, RAID cards, and SSDs.
PCIe comes in several sizes, including X1, X4, X8, X16, and X 32. X1, for example, has 1 TX Differential Line and 1 RX Differential Line, while X32 has 32 TX Differential Lines and 32 RX Differential Lines. You can use ANSYS2 to design a motherboard or an add-in board with PCIe.
You can use SI Wave, HFSS, or 3D Layout. However, if your board contains PCIe, you need to check it against the PCIe specifications. To do this, you can use the PCIe template developed by OZEN engineers. The template supports PCIe 1 to PCIe 7 standards.
When you open the template, you will find many circuits, some of which have more than one circuit. All necessary constraints, specifications, and limits are embedded in these circuits. To check your design, you need to obtain the S-parameters for your PCB, whether it's simulated or measured.
Each circuit in the template contains an input section, a middle section, and an output section. The input section contains all the possibilities for the source, represented by one eye source and one eye probe. The user can activate or deactivate any of these circuits.
The more circuits you activate, the longer the simulation takes. The input section also contains a switch that allows the user to select which eye source to activate and which channel to test. The output section is the reverse, with a switch to select between channels and sources.
Each I probe is connected to one source, and the number of I probes must match the number of I sources. The middle section contains the S-parameter files, which are more complicated than they appear.
Click on it to see a sub-circuit that shows your S-parameter file from your simulation or measurement, along with additional losses at the input and output. You need to add these losses before and after the S-parameter due to the standards.
For example, for PCIe 5, there are constraints on the maximum loss of the adding card and the maximum die on package loss, including the die. The same applies to the motherboard system board, which has a maximum allowed loss of 26. 5. To use this information, you need to know what you are testing.
Are you designing a motherboard or an adding card? Are you testing RX lines or TX lines? For example, if you are designing a motherboard RX line, you need to add 9.5 dB at the input representing the adding card and 8.5 dB at the output to represent the die to package loss.
The template includes all the necessary data and numbers for you to use. You can set the attenuation input, even attenuation input, odd attenuation output, and attenuation output to any value you want. You can also keep them zero if you just want to test your bare PCB alone.
The single channel circuit can be used to do many initial tests and study the effect of voltage and CTLE gain. You can run one case and change things and modify things.
The results include the width spec, which is a bathtub plot used to calculate the width of the circuit and compare it against the specification. The height I plot is a contour plot that shows the bit arrow value.
The statistical I report is with respect to the unit interval from 0 to 1. The eye diagram is with respect to the timeline, and the mask specifies the width and height as per the spec.
The quick eye analysis is used to generate eye graphs, while the verify eye analysis is used to generate bathtub graphs. The transient is used to understand or study the return loss of the whole link.
The cross talk circuits include the bare cross talk alone, cross talk plus jitter, and cross talk plus jitter plus noise. The preset one is used to study all the possibilities of equalization. The equalization circuit allows you to study the contribution of each equalizer.
The template does not do any design or optimization but can ensure that the design is meeting the specifications. The template contains all the necessary blocks with the necessary setup, so the user can build other circuits to design or verify or test other numbers or specifications.
