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Signal Integrity Analysis of QSFP/QSFP-DD SERDES Lines – Ansys HFSS

Home » Events » Signal Integrity Analysis of QSFP/QSFP-DD SERDES Lines – Ansys HFSS
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Pluggable transceivers are essential components for data centers and long-haul communications. This presentation will focus on SERDES lines, which are the transceiver’s RF input/output side. Learn how the signal integrity capabilities in Ansys HFSS and Circuit-Design are used to optimize designs, verify compliance and debug measurement results. Plus, explore new tools and techniques that designers can leverage at different stages. Register here.

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