Power Integrity Analyses

For today’s high-speed digital designs, it is critical that printed circuit boards (PCBs) and integrated circuit (IC) packages are accurately analyzed using a reliable simulation tool like ANSYS SIwave-DC so that potential pre- and post-layout power and signal integrity problems are caught early in the design cycles. ANSYS SIwave-DC is a new product specializing in proper verification of power delivery networks for DC power losses, early detection of thermal hotspots, and preventing failures during the design cycle. It is based on the highest-fidelity electromagnetic numerical analyses to solve all possible aspects involved in the high-speed digital designs of PCBs and IC packages. By using ANSYS SIwave-DC you can perform targeted analysis for DC power integrity. The solver uses a unique adaptive mesh refinement process to ensure highly accurate predictive analyses for chips, packages, and PCBs, which include ECAD primitives such as planes, traces, vias, bondwires, solderballs and solderbumps.

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ANSYS SIwave-DC simulates DC IR drop to evaluate the power delivery and to generate the power dissipation information for all of the copper layers of the board for a thermal simulation with ANSYS Icepak.

Translation from all third party ECAD vendors can be done using SIwave-DC. Multiple layout topologies are supported: PoP, SoC, SiP, and PKG on PCB.

If you do not design your PCB correctly, invariably bottlenecks will be caused in the DC current flow resulting in thermal hotspots. Bottlenecks and hotspots damage the PCB or the IC packages. By using SIwave-DC engineers can handle and avoid such extreme cases.

With the addition of this product to the ANSYS suite, an easy-to-use solution now exists for analyzing DC current flow in PCB’s and Packages. With SIwave-DC you can:

  • Avoid DC current crowding in planes, traces and vias which can lead to PCB failures and bad circuit performance
  • Couple bi-directionally to ANSYS Icepak to account for thermal losses (joule heating)
  • Decrease warranty costs associated with thermal-cycling issues
  • Debug existing PCB designs to make minor layout changes that result in major performance and reliability improvements
  • Reduce trouble-shooting time in the lab and get to market faster, with a better product